EDN

Self-timed interconnect solution supports AXI bus protocol

SAN FRANCISCO — EDA and intellectual property (IP) startup Silistix Ltd. has added support for the on-chip AMBA AXI bus protocol to the company's synthesized self-timed interconnect technology, ...
Semiconductor Engineering

Moving From AMBA ACE to CHI For Coherency

Introduced back in 2011, ACE (AXI Coherency Extensions) grew from the existing AXI protocol to satisfy the cache coherency maintenance demands of SoCs with multi core processors and shared caches in ...
Semiconductor Engineering

Min Lei

Introduced back in 2011, ACE (AXI Coherency Extensions) grew from the existing AXI protocol to satisfy the cache coherency maintenance demands of SoCs with multi core processors and shared caches in ...
EDN

SystemVerilog verification manual published

SAN FRANCISCO — The SystemVerilog Verification Methodology Manual (VMM), a book authored by verification experts from Synopsys Inc. and ARM Ltd. describing the use of SystemVerilog for verification, ...
Nasdaq

Arteris Expands Automotive Solutions for Armv9 Architecture CPUs

CAMPBELL, Calif., March 13, 2024 (GLOBE NEWSWIRE) -- Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation, today announced the first ...
Design And Reuse

Andes and Arculus System Collaborate to Integrate iPROfiler™ into AndeSysC, Expanding Virtual Platform Support for RISC-V SoC Design

Arculus System, a leading provider of advanced EDA and AI-driven software solutions, today announced its collaboration with Andes Technology, a leading supplier of high-performance, low-power ...