The AD9577 provides a multioutput clock generator function along with two on-chip phase-locked loop cores, PLL1 and PLL2, optimized for network clocking applications. The PLL designs are based on ...
The low noise and rapid hopping intervals required by CDMA wireless local-area network and fixed wireless access systems is possible with the MB15F7xUV ultra-small dual phase-locked loop (PLL) ...
Linear Technology Corporation (www.linear.com) has introduced the LTC3828, a dual step-down synchronous switching controller used to convert a 4.5V to 28V input voltage to two regulated output ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results
Feedback