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Nvidia's CUDA platform now supports RISC-V — support brings open source instruction set to AI platforms, joining x86 and Arm

At the 2025 RISC-V Summit in China, Nvidia announced that its CUDA software platform will be made compatible with the RISC-V instruction set architecture (ISA) on the CPU side of things. The news was ...
Elektronik Net

Instruction Set Architecture RISC-V

Open source software is popular – for operating systems as well as for office programs. But can this idea also work with hardware? We interviewed Rick O'Connor, Executive Director of the RISC-V ...
Design-Reuse

Microsemi Announces SoftConsole v5.1, the World's First Freely Available Windows-Hosted Eclipse Integrated Development Environment Supporting RISC-V Open Instruction Set ...

IDE Supporting All 32-bit RISC-V Implementations to be Presented at 54th Design Automation Conference in Austin, Texas on June 20 ALISO VIEJO, Calif., Jun. 15, 2017 – Microsemi Corporation (Nasdaq: ...
Nasdaq

The Industry’s First SoC FPGA Development Kit Based on the RISC-V Instruction Set Architecture is Now Available

Microchip’s PolarFire® SoC FPGA Icicle Kit enables the broad RISC-V-based Mi-V ecosystem for the industry’s lowest-power FPGA CHANDLER, Ariz., Sept. 16, 2020 (GLOBE NEWSWIRE) -- The rising adoption of ...
Semiconductor Engineering

Implementing Cryptographic Algorithms for the RISC-V Instruction Set Architecture in Two Cases

This new technical paper titled “Symmetric Cryptography on RISC-V: Performance Evaluation of Standardized Algorithms” was published by researchers at Intel, North Arizona University and Google, with ...
AppleInsider

Apple investigating RISC-V instruction set architecture, job listing shows

A job listing posted to Apple's website this week reveals the company is researching RISC-V instruction set architecture solutions, suggesting future in-house chip designs might implement the ...
Hackaday

instruction set architecture

An Instruction Set Architecture (ISA) defines the software interface through which for example a central processor unit (CPU) is controlled. Unlike early computer systems which didn’t define a ...
Electronic Design

RISC-V: The Instruction-Set Alternative

First and foremost, RISC-V is a modular, open-source, instruction set definition and nothing more. RISC-V as an ecosystem is much more. The instruction set provides the encoding and semantics, but it ...
EDN

Microsemi announces SoftConsole v5.1, the world’s first freely available Windows-hosted Eclipse integrated development environment supporting RISC-V open instruction set ...

Microsemi Corporation, a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, announced the release of its SoftConsole version 5.1, the world’s ...