Design-Reuse

A Low Complexity Parallel Architecture of Turbo Decoder Based on QPP Interleaver for 3GPP-LTE/LTE-A

This paper propose an improved method called the modified warm-up-free parallel window(PW) MAP decoding schemes to implement highly-parallel Turbo decoder architecture based on the QPP(Quadratic ...
Design-Reuse

3gpp lte turbo decoder IP Listing

TC7000-LTE is a convolutional turbo code (CTC) decoder optimized for FPGAs. Its unique pipe-line architecture enables to reach very high clock frequencies on high end FPGAs It offers several ...
EDN

Lattice expands wireless solutions with 3FPP-LTE CTC decoder IP core

The folks at Lattice have announced the availability of a 3GPP-Long-Term Evolution (LTE) Convolutional Turbo Code (CTC) Decoder intellectual property (IP) core from TurboConcept, a member of the ...
CIOL

Xilinx's next-gen LTE eNodeB design platform

BARCELONA, SPAIN: At the recently held Mobile World Congress 2009, Xilinx Inc. unveiled its product roadmap for delivering the first common platform to integrate the design and development of ...
Electronic Design

LTE Comm Processor Implements Mutli Dispatch VLIW Architecture

Tensilica has delivered a range of processor architectures like the Xtensa LX (see Power Play For The SoC Developers) as well as DSP and the ConnX comm processor (see Dataplane Processing Unit More ...
ZDNet

Lucent 'turbo decoder' revs networks

Lucent Technologies said Tuesday that it's ready to license new cell phone technology it says will let carriers build telephone networks that are 10 times faster than anything now commercially ...