Company Expands Product Offering for FPGA and 32-bit LEON Open Source VHDL Processor Development. The new GR-CPCI-XC2V board provides a larger capacity FPGA and is implemented in a Compact PCI format ...
In this paper, the authors proposed on I2c protocol following master controller. This controller is connected to a microprocessor or computer and reads 8 bit instructions following I2C protocol. The ...
Gothenburg, Sweden -- February 5, 2009-- Aeroflex Gaisler AB announced that a USB 2.0 Device Controller IP (Intellectual Property) core is now available as a part of the GRLIB IP library. The Device ...
A family of turbocoder IP cores has been introduced for implementation in SoCs in high-speed, wireless communication applications. Turbo coding is used for FEC in a variety of wireless data ...
May 29, 2007 -- Gaisler Research AB announced that a USB 2.0 Host Controller IP (Intellectual Property) core is now available as a part of the GRLIB IP library. The Host Controller supports High-, ...
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